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Job Title: Senior Design Verification Engineer
Location: Plano, TX (hybrid)
Company OverviewIontra is a Denver, Colorado-based technology company revolutionizing the electrification movement by creating innovative charge-control solutions. We are reinventing the way batteries are charged to unlock their untapped performance. To us, batteries are more than just power sources. They’re the enablers of innovation and key to accelerating electrification adoption, and we’re proud to be leading the charge. Our third-party validated charge-control solution improves battery performance metrics, such as charge speed and cycle life, by 2x to 4x, no matter the size or complexity of the product.
Role SummaryIn this role, you’ll be tasked with per forming essential duties as a part of both the Iontra research team and the product development team. The candidate should be willing to adapt to methodologies and tools used by Iontra such as Agile and Atlassian. This is a full-time role located in our Plano, TX office in a fast-paced startup environment. For the right DV candidate with chip-level experience (SoC/IC, not IP) this could be an opportunity to develop the appropriate skills to become an IC Architect.
Salary Range: $110k - $135k (salary is based on education, experience, skillset, and market value).
What You’ll Be DoingBe a key technical contributor in a team of design verification engineers focused on pre-silicon verification of custom charge controller IP & IC
Define verification test plans and create testbench architectures
Work with cross-functional teams to identify requirements, review specifications, and ensure requirements are met in the design
Contribute to definition and implementation of verification methodologies
Integrate VIP and 3rd party IP into designs
Define and maintain project schedules while ensuring metrics-driven design quality
You’ll Need These QualificationsB.S or higher in Electrical or Computer Engineering
3-5 years of experience in IP/IC-level Design Verification
In lieu of degree, additional years of experience may suffice
Experience in implementing testbenches in SystemVerilog and UVM
SoC (system on a chip) experience with GLS, SDF, or UPF
Hands-on knowledge of Synopsys EDA tools - VCS, VC Formal, Verdi
Gate-level simulation with and without timing annotations
Coverage definition, collection, and closure activities
Knowledge of AMBA AHB/AXI/APB bus protocols
Working knowledge of Assembly, C, and C++ and use in embedded systems
Familiarity with I/O protocols such as I2C, SPI, UART, and Ethernet
Proven ability to collaborate and communicate effectively with others
Familiarity with FPGA design cycle
BenefitsHealth Care Plan (Medical, Dental & Vision)
You’ll Love This Job If YouAre driven to be part of a team doing big things to help our planet
Aspire to work with a successful veteran startup management team
Are a self-starter and always find ways to get your work done and help team members
Are an organized, detail-oriented person being very good at time management
Are determined and resilient to keep things moving forward at a startup pace
Are assertive and able to influence and partner with the team to get things done
Enjoy new challenges and change
Iontra has an equal employment opportunity (EEO) policy that provides that no applicant or staff member will be discriminated against on the basis of , , , , , marital status, , veteran status, , , or .
Seniority level
Mid-Senior level
Employment type
Full-time
Job function
Engineering and Information Technology
Industries
Staffing and Recruiting
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The estimated total pay for a Senior Verification Engineer is $267,637 per year, with an average salary of $160,002 per year. These numbers represent the median, which is the midpoint of the ranges from our proprietary Total Pay Estimate model and based on salaries collected from our users.
Years 1-4: Obtaining a Bachelor's degree in a relevant field such as Electrical Engineering, Computer Engineering, or a related field. Years 5-6: Accumulating the necessary work experience, which is typically 1-2 years, in Design Verification, Electronic Testing, or related duties.
The demand for VLSI Verification Engineers is consistently high, with numerous job opportunities available in various sectors: Semiconductor Companies: Leading semiconductor manufacturers, including industry giants like Intel, AMD, and NVIDIA, are perpetually on the lookout for skilled VLSI Verification Engineers.
Google Asic Design Verification Engineer salary in India ranges between ₹ ₹32 Lakhs to ₹ ₹60 Lakhs with an average annual salary of ₹ ₹43.7 Lakhs. Salary estimates are based on 9 Google latest salaries received from various employees of Google.
Employees as Design Verification Engineer earn an average of ₹18.7lakhs, mostly ranging from ₹13.2lakhs per year to ₹61.0lakhs per year based on 49 profiles.
A design engineer translates an architecture into micro architecture and implements them using RTL (Register Translation Level) . A design verification engineer works closely with design engineer to verify that the functionality of his implementation matches the architecture/micro architecture specification.
When you test, you are making sure that the product or system works but only after you have created the product components, chips, boards, packages and subsystems. When you verify, you are making sure that the product or system works before it has been created or manufactured.
The estimated total pay range for a Senior Design Engineer at NVIDIA is ₹18.9L–₹58.5L per year, which includes base salary and additional pay. The average Senior Design Engineer base salary at NVIDIA is ₹26.5L per year.
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